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IRFS654 CY7C1332 TSH240 FST10130 A2228 M13251GE 16253P4 TZQ5252B
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Interface AC Characteristics MPU Interface (GND = 0V, VCC = 2.7 to 5.5V, Ta = -30 to +75C)* Item Symbol Min Typ Max 1000 -- -- E cycle time t CYC E high level width PWEH 450 -- -- E low level width PWEL 450 -- -- E rise time tr -- -- 25 E fall time tf -- Address setup time t AS 140 Address hold time t AH 10 Data setup time t DSW 200 Data delay time t DDR -- Data hold time (write) t DHW 10 Data hold time (read) t DHR 20 Note: Specified at +75C for die products. tCYC PWEL VIHT E VILT tAS VIHT R/W VILT tAS VIHT CS1-CS3 D/I VILT
Unit ns ns ns ns ns ns ns ns ns ns ns
Note Fig. 10, Fig. 11
-- -- -- -- -- -- --
25 -- -- -- 320 -- --
Fig. 10 Fig. 11, Fig. 12 Fig. 10 Fig. 11
PWEH tr tf tAH
tAH
tDSW VIHT VILT
tDHW
DB0-DB7
Figure 9 MPU Write Timing

tCYC E PWEL tr R/W VIHT VILT VIHT VILT tDDR DB0-DB7 VIHT VILT tDHR tAS tAS CS1-CS3 D/I tAH tAH PWEH tf
Figure 10 MPU Read Timing
Instructions 0 1 1 0 Busy 0 RESET 1: Reset 0: Normal ON/ Reset 0 OFF 0 0 0 Reads the status. 1 Y address (0-63) 0 1 1 1 Page (0-7) 1 Display start line (0-63) Specifies the RAM line displayed at the top of the screen. Sets the page (X address) of RAM at the page (X address) register. Sets the Y address in the Y address counter. 0 1 1 1 1 1 1/0 Controls display on/off. RAM data and internal status are not affected. 1: on, 0: off.
Display on/off
*'@2
Display start line
Set page (X address)
Set Y address
Status read

Code DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Functions
R/W
D/I
0
0
0
0
0
0
0
0
1
0
ON/OFF 1: Display off 0: Display on Busy Write data 1: Internal operation 0: Ready
Write display data
0
1
Writes data DB0 (LSB) to DB7 (MSB) on the data bus into display RAM.
Reads data DB0 (LSB) to DB7 (MSB) from the display RAM to the data bus.
Read display data
1
1
Read data
Has access to the address of the display RAM specified in advance. After the access, Y address is increased by 1.
Note: Busy time varies with the frequency (fCLK) of o1, and o2. (1/fCLK TBUSY 3/fCLK)
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